
get-pid-name:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400760 <_init>:
  400760:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400764:	910003fd 	mov	x29, sp
  400768:	94000058 	bl	4008c8 <call_weak_fn>
  40076c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400770:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400780 <.plt>:
  400780:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400784:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf29c>
  400788:	f947fe11 	ldr	x17, [x16, #4088]
  40078c:	913fe210 	add	x16, x16, #0xff8
  400790:	d61f0220 	br	x17
  400794:	d503201f 	nop
  400798:	d503201f 	nop
  40079c:	d503201f 	nop

00000000004007a0 <strlen@plt>:
  4007a0:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  4007a4:	f9400211 	ldr	x17, [x16]
  4007a8:	91000210 	add	x16, x16, #0x0
  4007ac:	d61f0220 	br	x17

00000000004007b0 <readlink@plt>:
  4007b0:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  4007b4:	f9400611 	ldr	x17, [x16, #8]
  4007b8:	91002210 	add	x16, x16, #0x8
  4007bc:	d61f0220 	br	x17

00000000004007c0 <opendir@plt>:
  4007c0:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  4007c4:	f9400a11 	ldr	x17, [x16, #16]
  4007c8:	91004210 	add	x16, x16, #0x10
  4007cc:	d61f0220 	br	x17

00000000004007d0 <snprintf@plt>:
  4007d0:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  4007d4:	f9400e11 	ldr	x17, [x16, #24]
  4007d8:	91006210 	add	x16, x16, #0x18
  4007dc:	d61f0220 	br	x17

00000000004007e0 <atoi@plt>:
  4007e0:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  4007e4:	f9401211 	ldr	x17, [x16, #32]
  4007e8:	91008210 	add	x16, x16, #0x20
  4007ec:	d61f0220 	br	x17

00000000004007f0 <strncmp@plt>:
  4007f0:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  4007f4:	f9401611 	ldr	x17, [x16, #40]
  4007f8:	9100a210 	add	x16, x16, #0x28
  4007fc:	d61f0220 	br	x17

0000000000400800 <__libc_start_main@plt>:
  400800:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400804:	f9401a11 	ldr	x17, [x16, #48]
  400808:	9100c210 	add	x16, x16, #0x30
  40080c:	d61f0220 	br	x17

0000000000400810 <readdir@plt>:
  400810:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400814:	f9401e11 	ldr	x17, [x16, #56]
  400818:	9100e210 	add	x16, x16, #0x38
  40081c:	d61f0220 	br	x17

0000000000400820 <closedir@plt>:
  400820:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400824:	f9402211 	ldr	x17, [x16, #64]
  400828:	91010210 	add	x16, x16, #0x40
  40082c:	d61f0220 	br	x17

0000000000400830 <strrchr@plt>:
  400830:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400834:	f9402611 	ldr	x17, [x16, #72]
  400838:	91012210 	add	x16, x16, #0x48
  40083c:	d61f0220 	br	x17

0000000000400840 <__gmon_start__@plt>:
  400840:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400844:	f9402a11 	ldr	x17, [x16, #80]
  400848:	91014210 	add	x16, x16, #0x50
  40084c:	d61f0220 	br	x17

0000000000400850 <abort@plt>:
  400850:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400854:	f9402e11 	ldr	x17, [x16, #88]
  400858:	91016210 	add	x16, x16, #0x58
  40085c:	d61f0220 	br	x17

0000000000400860 <printf@plt>:
  400860:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400864:	f9403211 	ldr	x17, [x16, #96]
  400868:	91018210 	add	x16, x16, #0x60
  40086c:	d61f0220 	br	x17

0000000000400870 <fprintf@plt>:
  400870:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400874:	f9403611 	ldr	x17, [x16, #104]
  400878:	9101a210 	add	x16, x16, #0x68
  40087c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400880 <_start>:
  400880:	d280001d 	mov	x29, #0x0                   	// #0
  400884:	d280001e 	mov	x30, #0x0                   	// #0
  400888:	aa0003e5 	mov	x5, x0
  40088c:	f94003e1 	ldr	x1, [sp]
  400890:	910023e2 	add	x2, sp, #0x8
  400894:	910003e6 	mov	x6, sp
  400898:	580000c0 	ldr	x0, 4008b0 <_start+0x30>
  40089c:	580000e3 	ldr	x3, 4008b8 <_start+0x38>
  4008a0:	58000104 	ldr	x4, 4008c0 <_start+0x40>
  4008a4:	97ffffd7 	bl	400800 <__libc_start_main@plt>
  4008a8:	97ffffea 	bl	400850 <abort@plt>
  4008ac:	00000000 	.inst	0x00000000 ; undefined
  4008b0:	00400b70 	.word	0x00400b70
  4008b4:	00000000 	.word	0x00000000
  4008b8:	00400c68 	.word	0x00400c68
  4008bc:	00000000 	.word	0x00000000
  4008c0:	00400ce8 	.word	0x00400ce8
  4008c4:	00000000 	.word	0x00000000

00000000004008c8 <call_weak_fn>:
  4008c8:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf29c>
  4008cc:	f947f000 	ldr	x0, [x0, #4064]
  4008d0:	b4000040 	cbz	x0, 4008d8 <call_weak_fn+0x10>
  4008d4:	17ffffdb 	b	400840 <__gmon_start__@plt>
  4008d8:	d65f03c0 	ret
  4008dc:	00000000 	.inst	0x00000000 ; undefined

00000000004008e0 <deregister_tm_clones>:
  4008e0:	b0000080 	adrp	x0, 411000 <strlen@GLIBC_2.17>
  4008e4:	91020000 	add	x0, x0, #0x80
  4008e8:	b0000081 	adrp	x1, 411000 <strlen@GLIBC_2.17>
  4008ec:	91020021 	add	x1, x1, #0x80
  4008f0:	eb00003f 	cmp	x1, x0
  4008f4:	540000a0 	b.eq	400908 <deregister_tm_clones+0x28>  // b.none
  4008f8:	90000001 	adrp	x1, 400000 <_init-0x760>
  4008fc:	f9468421 	ldr	x1, [x1, #3336]
  400900:	b4000041 	cbz	x1, 400908 <deregister_tm_clones+0x28>
  400904:	d61f0020 	br	x1
  400908:	d65f03c0 	ret
  40090c:	d503201f 	nop

0000000000400910 <register_tm_clones>:
  400910:	b0000080 	adrp	x0, 411000 <strlen@GLIBC_2.17>
  400914:	91020000 	add	x0, x0, #0x80
  400918:	b0000081 	adrp	x1, 411000 <strlen@GLIBC_2.17>
  40091c:	91020021 	add	x1, x1, #0x80
  400920:	cb000021 	sub	x1, x1, x0
  400924:	9343fc21 	asr	x1, x1, #3
  400928:	8b41fc21 	add	x1, x1, x1, lsr #63
  40092c:	9341fc21 	asr	x1, x1, #1
  400930:	b40000a1 	cbz	x1, 400944 <register_tm_clones+0x34>
  400934:	90000002 	adrp	x2, 400000 <_init-0x760>
  400938:	f9468842 	ldr	x2, [x2, #3344]
  40093c:	b4000042 	cbz	x2, 400944 <register_tm_clones+0x34>
  400940:	d61f0040 	br	x2
  400944:	d65f03c0 	ret

0000000000400948 <__do_global_dtors_aux>:
  400948:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40094c:	910003fd 	mov	x29, sp
  400950:	f9000bf3 	str	x19, [sp, #16]
  400954:	b0000093 	adrp	x19, 411000 <strlen@GLIBC_2.17>
  400958:	39422260 	ldrb	w0, [x19, #136]
  40095c:	35000080 	cbnz	w0, 40096c <__do_global_dtors_aux+0x24>
  400960:	97ffffe0 	bl	4008e0 <deregister_tm_clones>
  400964:	52800020 	mov	w0, #0x1                   	// #1
  400968:	39022260 	strb	w0, [x19, #136]
  40096c:	f9400bf3 	ldr	x19, [sp, #16]
  400970:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400974:	d65f03c0 	ret

0000000000400978 <frame_dummy>:
  400978:	17ffffe6 	b	400910 <register_tm_clones>

000000000040097c <find_pid_by_name>:
  40097c:	d2840c10 	mov	x16, #0x2060                	// #8288
  400980:	cb3063ff 	sub	sp, sp, x16
  400984:	a9007bfd 	stp	x29, x30, [sp]
  400988:	910003fd 	mov	x29, sp
  40098c:	f9000fa0 	str	x0, [x29, #24]
  400990:	f9000ba1 	str	x1, [x29, #16]
  400994:	b9205fbf 	str	wzr, [x29, #8284]
  400998:	f9400ba0 	ldr	x0, [x29, #16]
  40099c:	b900001f 	str	wzr, [x0]
  4009a0:	f9400fa0 	ldr	x0, [x29, #24]
  4009a4:	97ffff7f 	bl	4007a0 <strlen@plt>
  4009a8:	b9205ba0 	str	w0, [x29, #8280]
  4009ac:	90000000 	adrp	x0, 400000 <_init-0x760>
  4009b0:	91346000 	add	x0, x0, #0xd18
  4009b4:	97ffff83 	bl	4007c0 <opendir@plt>
  4009b8:	f9102ba0 	str	x0, [x29, #8272]
  4009bc:	f9502ba0 	ldr	x0, [x29, #8272]
  4009c0:	f100001f 	cmp	x0, #0x0
  4009c4:	54000b21 	b.ne	400b28 <find_pid_by_name+0x1ac>  // b.any
  4009c8:	90000000 	adrp	x0, 400000 <_init-0x760>
  4009cc:	91348000 	add	x0, x0, #0xd20
  4009d0:	97ffffa4 	bl	400860 <printf@plt>
  4009d4:	12800000 	mov	w0, #0xffffffff            	// #-1
  4009d8:	14000062 	b	400b60 <find_pid_by_name+0x1e4>
  4009dc:	f95027a0 	ldr	x0, [x29, #8264]
  4009e0:	91004c00 	add	x0, x0, #0x13
  4009e4:	97ffff7f 	bl	4007e0 <atoi@plt>
  4009e8:	b92047a0 	str	w0, [x29, #8260]
  4009ec:	b96047a0 	ldr	w0, [x29, #8260]
  4009f0:	7100001f 	cmp	w0, #0x0
  4009f4:	540008c0 	b.eq	400b0c <find_pid_by_name+0x190>  // b.none
  4009f8:	f95027a0 	ldr	x0, [x29, #8264]
  4009fc:	91004c02 	add	x2, x0, #0x13
  400a00:	90000000 	adrp	x0, 400000 <_init-0x760>
  400a04:	9134e001 	add	x1, x0, #0xd38
  400a08:	9100a3a0 	add	x0, x29, #0x28
  400a0c:	aa0203e3 	mov	x3, x2
  400a10:	aa0103e2 	mov	x2, x1
  400a14:	d2820021 	mov	x1, #0x1001                	// #4097
  400a18:	97ffff6e 	bl	4007d0 <snprintf@plt>
  400a1c:	914007a1 	add	x1, x29, #0x1, lsl #12
  400a20:	9100c021 	add	x1, x1, #0x30
  400a24:	9100a3a0 	add	x0, x29, #0x28
  400a28:	52820002 	mov	w2, #0x1000                	// #4096
  400a2c:	97ffff61 	bl	4007b0 <readlink@plt>
  400a30:	b92043a0 	str	w0, [x29, #8256]
  400a34:	b96043a0 	ldr	w0, [x29, #8256]
  400a38:	7100001f 	cmp	w0, #0x0
  400a3c:	540006cb 	b.lt	400b14 <find_pid_by_name+0x198>  // b.tstop
  400a40:	b9a043a0 	ldrsw	x0, [x29, #8256]
  400a44:	914007a1 	add	x1, x29, #0x1, lsl #12
  400a48:	9100c021 	add	x1, x1, #0x30
  400a4c:	3820683f 	strb	wzr, [x1, x0]
  400a50:	914007a0 	add	x0, x29, #0x1, lsl #12
  400a54:	9100c000 	add	x0, x0, #0x30
  400a58:	528005e1 	mov	w1, #0x2f                  	// #47
  400a5c:	97ffff75 	bl	400830 <strrchr@plt>
  400a60:	f9101fa0 	str	x0, [x29, #8248]
  400a64:	f9501fa0 	ldr	x0, [x29, #8248]
  400a68:	f100001f 	cmp	x0, #0x0
  400a6c:	54000580 	b.eq	400b1c <find_pid_by_name+0x1a0>  // b.none
  400a70:	f9501fa0 	ldr	x0, [x29, #8248]
  400a74:	91000400 	add	x0, x0, #0x1
  400a78:	f9101fa0 	str	x0, [x29, #8248]
  400a7c:	f9501fa0 	ldr	x0, [x29, #8248]
  400a80:	97ffff48 	bl	4007a0 <strlen@plt>
  400a84:	b92037a0 	str	w0, [x29, #8244]
  400a88:	b96037a1 	ldr	w1, [x29, #8244]
  400a8c:	b9605ba0 	ldr	w0, [x29, #8280]
  400a90:	6b00003f 	cmp	w1, w0
  400a94:	5400048b 	b.lt	400b24 <find_pid_by_name+0x1a8>  // b.tstop
  400a98:	b9a05ba0 	ldrsw	x0, [x29, #8280]
  400a9c:	aa0003e2 	mov	x2, x0
  400aa0:	f9501fa1 	ldr	x1, [x29, #8248]
  400aa4:	f9400fa0 	ldr	x0, [x29, #24]
  400aa8:	97ffff52 	bl	4007f0 <strncmp@plt>
  400aac:	7100001f 	cmp	w0, #0x0
  400ab0:	540003c1 	b.ne	400b28 <find_pid_by_name+0x1ac>  // b.any
  400ab4:	b9a05ba0 	ldrsw	x0, [x29, #8280]
  400ab8:	f9501fa1 	ldr	x1, [x29, #8248]
  400abc:	8b000020 	add	x0, x1, x0
  400ac0:	39400000 	ldrb	w0, [x0]
  400ac4:	7100801f 	cmp	w0, #0x20
  400ac8:	540000e0 	b.eq	400ae4 <find_pid_by_name+0x168>  // b.none
  400acc:	b9a05ba0 	ldrsw	x0, [x29, #8280]
  400ad0:	f9501fa1 	ldr	x1, [x29, #8248]
  400ad4:	8b000020 	add	x0, x1, x0
  400ad8:	39400000 	ldrb	w0, [x0]
  400adc:	7100001f 	cmp	w0, #0x0
  400ae0:	54000241 	b.ne	400b28 <find_pid_by_name+0x1ac>  // b.any
  400ae4:	b9a05fa0 	ldrsw	x0, [x29, #8284]
  400ae8:	d37ef400 	lsl	x0, x0, #2
  400aec:	f9400ba1 	ldr	x1, [x29, #16]
  400af0:	8b000020 	add	x0, x1, x0
  400af4:	b96047a1 	ldr	w1, [x29, #8260]
  400af8:	b9000001 	str	w1, [x0]
  400afc:	b9605fa0 	ldr	w0, [x29, #8284]
  400b00:	11000400 	add	w0, w0, #0x1
  400b04:	b9205fa0 	str	w0, [x29, #8284]
  400b08:	14000008 	b	400b28 <find_pid_by_name+0x1ac>
  400b0c:	d503201f 	nop
  400b10:	14000006 	b	400b28 <find_pid_by_name+0x1ac>
  400b14:	d503201f 	nop
  400b18:	14000004 	b	400b28 <find_pid_by_name+0x1ac>
  400b1c:	d503201f 	nop
  400b20:	14000002 	b	400b28 <find_pid_by_name+0x1ac>
  400b24:	d503201f 	nop
  400b28:	f9502ba0 	ldr	x0, [x29, #8272]
  400b2c:	97ffff39 	bl	400810 <readdir@plt>
  400b30:	f91027a0 	str	x0, [x29, #8264]
  400b34:	f95027a0 	ldr	x0, [x29, #8264]
  400b38:	f100001f 	cmp	x0, #0x0
  400b3c:	54fff501 	b.ne	4009dc <find_pid_by_name+0x60>  // b.any
  400b40:	b9a05fa0 	ldrsw	x0, [x29, #8284]
  400b44:	d37ef400 	lsl	x0, x0, #2
  400b48:	f9400ba1 	ldr	x1, [x29, #16]
  400b4c:	8b000020 	add	x0, x1, x0
  400b50:	b900001f 	str	wzr, [x0]
  400b54:	f9502ba0 	ldr	x0, [x29, #8272]
  400b58:	97ffff32 	bl	400820 <closedir@plt>
  400b5c:	52800000 	mov	w0, #0x0                   	// #0
  400b60:	a9407bfd 	ldp	x29, x30, [sp]
  400b64:	d2840c10 	mov	x16, #0x2060                	// #8288
  400b68:	8b3063ff 	add	sp, sp, x16
  400b6c:	d65f03c0 	ret

0000000000400b70 <main>:
  400b70:	d2880610 	mov	x16, #0x4030                	// #16432
  400b74:	cb3063ff 	sub	sp, sp, x16
  400b78:	a9007bfd 	stp	x29, x30, [sp]
  400b7c:	910003fd 	mov	x29, sp
  400b80:	b9001fa0 	str	w0, [x29, #28]
  400b84:	f9000ba1 	str	x1, [x29, #16]
  400b88:	b9401fa0 	ldr	w0, [x29, #28]
  400b8c:	7100081f 	cmp	w0, #0x2
  400b90:	540001c0 	b.eq	400bc8 <main+0x58>  // b.none
  400b94:	b0000080 	adrp	x0, 411000 <strlen@GLIBC_2.17>
  400b98:	91020000 	add	x0, x0, #0x80
  400b9c:	f9400003 	ldr	x3, [x0]
  400ba0:	f9400ba0 	ldr	x0, [x29, #16]
  400ba4:	f9400001 	ldr	x1, [x0]
  400ba8:	90000000 	adrp	x0, 400000 <_init-0x760>
  400bac:	91352000 	add	x0, x0, #0xd48
  400bb0:	aa0103e2 	mov	x2, x1
  400bb4:	aa0003e1 	mov	x1, x0
  400bb8:	aa0303e0 	mov	x0, x3
  400bbc:	97ffff2d 	bl	400870 <fprintf@plt>
  400bc0:	52800000 	mov	w0, #0x0                   	// #0
  400bc4:	14000024 	b	400c54 <main+0xe4>
  400bc8:	f9400ba0 	ldr	x0, [x29, #16]
  400bcc:	91002000 	add	x0, x0, #0x8
  400bd0:	f9400000 	ldr	x0, [x0]
  400bd4:	9100a3a1 	add	x1, x29, #0x28
  400bd8:	97ffff69 	bl	40097c <find_pid_by_name>
  400bdc:	914013a1 	add	x1, x29, #0x4, lsl #12
  400be0:	b9002820 	str	w0, [x1, #40]
  400be4:	914013a0 	add	x0, x29, #0x4, lsl #12
  400be8:	b9402800 	ldr	w0, [x0, #40]
  400bec:	7100001f 	cmp	w0, #0x0
  400bf0:	54000301 	b.ne	400c50 <main+0xe0>  // b.any
  400bf4:	914013a0 	add	x0, x29, #0x4, lsl #12
  400bf8:	b9002c1f 	str	wzr, [x0, #44]
  400bfc:	1400000e 	b	400c34 <main+0xc4>
  400c00:	914013a0 	add	x0, x29, #0x4, lsl #12
  400c04:	b9802c00 	ldrsw	x0, [x0, #44]
  400c08:	d37ef400 	lsl	x0, x0, #2
  400c0c:	9100a3a1 	add	x1, x29, #0x28
  400c10:	b8606821 	ldr	w1, [x1, x0]
  400c14:	90000000 	adrp	x0, 400000 <_init-0x760>
  400c18:	91358000 	add	x0, x0, #0xd60
  400c1c:	97ffff11 	bl	400860 <printf@plt>
  400c20:	914013a0 	add	x0, x29, #0x4, lsl #12
  400c24:	b9402c00 	ldr	w0, [x0, #44]
  400c28:	11000400 	add	w0, w0, #0x1
  400c2c:	914013a1 	add	x1, x29, #0x4, lsl #12
  400c30:	b9002c20 	str	w0, [x1, #44]
  400c34:	914013a0 	add	x0, x29, #0x4, lsl #12
  400c38:	b9802c00 	ldrsw	x0, [x0, #44]
  400c3c:	d37ef400 	lsl	x0, x0, #2
  400c40:	9100a3a1 	add	x1, x29, #0x28
  400c44:	b8606820 	ldr	w0, [x1, x0]
  400c48:	7100001f 	cmp	w0, #0x0
  400c4c:	54fffda1 	b.ne	400c00 <main+0x90>  // b.any
  400c50:	52800000 	mov	w0, #0x0                   	// #0
  400c54:	a9407bfd 	ldp	x29, x30, [sp]
  400c58:	d2880610 	mov	x16, #0x4030                	// #16432
  400c5c:	8b3063ff 	add	sp, sp, x16
  400c60:	d65f03c0 	ret
  400c64:	00000000 	.inst	0x00000000 ; undefined

0000000000400c68 <__libc_csu_init>:
  400c68:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400c6c:	910003fd 	mov	x29, sp
  400c70:	a901d7f4 	stp	x20, x21, [sp, #24]
  400c74:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf29c>
  400c78:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf29c>
  400c7c:	91374294 	add	x20, x20, #0xdd0
  400c80:	913722b5 	add	x21, x21, #0xdc8
  400c84:	a902dff6 	stp	x22, x23, [sp, #40]
  400c88:	cb150294 	sub	x20, x20, x21
  400c8c:	f9001ff8 	str	x24, [sp, #56]
  400c90:	2a0003f6 	mov	w22, w0
  400c94:	aa0103f7 	mov	x23, x1
  400c98:	9343fe94 	asr	x20, x20, #3
  400c9c:	aa0203f8 	mov	x24, x2
  400ca0:	97fffeb0 	bl	400760 <_init>
  400ca4:	b4000194 	cbz	x20, 400cd4 <__libc_csu_init+0x6c>
  400ca8:	f9000bb3 	str	x19, [x29, #16]
  400cac:	d2800013 	mov	x19, #0x0                   	// #0
  400cb0:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400cb4:	aa1803e2 	mov	x2, x24
  400cb8:	aa1703e1 	mov	x1, x23
  400cbc:	2a1603e0 	mov	w0, w22
  400cc0:	91000673 	add	x19, x19, #0x1
  400cc4:	d63f0060 	blr	x3
  400cc8:	eb13029f 	cmp	x20, x19
  400ccc:	54ffff21 	b.ne	400cb0 <__libc_csu_init+0x48>  // b.any
  400cd0:	f9400bb3 	ldr	x19, [x29, #16]
  400cd4:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400cd8:	a942dff6 	ldp	x22, x23, [sp, #40]
  400cdc:	f9401ff8 	ldr	x24, [sp, #56]
  400ce0:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400ce4:	d65f03c0 	ret

0000000000400ce8 <__libc_csu_fini>:
  400ce8:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400cec <_fini>:
  400cec:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400cf0:	910003fd 	mov	x29, sp
  400cf4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400cf8:	d65f03c0 	ret
